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ltc6431-15 1 643115f typical a pplica t ion fea t ures descrip t ion 50 gain block if amplifier the ltc ? 6431-15 is a gain-block amplifier with excellent linearity at frequencies beyond 1000mhz and with low associated output noise. the unique combination of high linearity, low noise and low power dissipation make this an ideal candidate for many signal-chain applications. the ltc6431-15 is easy to use, requiring a minimum of external components. it is internally input/output matched to 50 and it draws only 90ma from a single 5v supply. on-chip bias and temperature compensation maintain performance over environmental changes. the ltc6431-15 uses a high performance sige bicmos process for excellent repeatability compared with similar gaas amplifiers. all a-grade ltc6431-15 devices are tested and guaranteed for oip3 at 240mhz. the ltc6431-15 is housed in a 4mm 4mm 24-lead qfn package with an exposed pad for thermal management and low inductance. single-ended if amplifier oip3 vs frequency a pplica t ions n 20mhz to 1700mhz bandwidth n 15.5db power gain n 47dbm oip3 at 240mhz into a 50 load n nf = 3.33db at 240mhz n 1nv/hz total input noise n s11 < C15db up to 1.2ghz n s22 < C15db up to 1.2ghz n > 2v p-p linear output swing n p1db = 20.6dbm n dc power = 450mw n 50 single-ended operation n insensitive to v cc variation n a-grade 100% oip3 tested at 240mhz n input/output internally matched to 50 n single 5v supply n unconditionally stable n single-ended if amplifier n adc driver n catv l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 643115 ta01a ltc6431-15 r source 50 v cc = 5v 1000pf 1000pf 5v r f choke, 560nh r load 50 frequency (mhz) 0 oip3 (dbm) 44 46 48 42 40 400 800 200 600 1000 38 36 50 643115 ta01b v cc = 5v, t = 25c p out = 2dbm/ tone f space = 1mhz z in = z out = 50
ltc6431-15 2 643115f p in c on f igura t ion a bsolu t e maxi m u m r a t ings total supply voltage (v cc to gnd) ........................... 5.5v amplifier output current (out) ........................... 10 5ma rf input power, continuous, 50 (note 2).......... 15dbm rf input power, 100s pulse, 50 (note 2) ........ 2 0dbm operating case temperature range (t case ) .......................................... C4 0c to 85c storage temperature range .................. C 65c to 150c junction temperature (t j ) .................................... 150 c (note 1) 24 23 22 21 20 19 7 8 9 top view 25 gnd uf package 24-lead (4mm 4mm) plastic qfn 10 11 12 6 5 4 3 2 1 13 14 15 16 17 18 dnc dnc dnc dnc dnc dnc out gnd t_diode dnc dnc dnc in gnd v cc dnc dnc dnc dnc gnd v cc dnc dnc dnc t jmax = 150c, v jc = 54c/w exposed pad (pin 25) is gnd, must be soldered to pcb o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range ltc6431aiuf-15#pbf ltc6431aiuf-15#trpbf 43115 24-lead (4mm 4mm) plastic qfn C40c to 85c ltc6431biuf-15#pbf ltc6431biuf-15#trpbf 43115 24-lead (4mm 4mm) plastic qfn C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ d c e lec t rical c harac t eris t ics symbol parameter conditions min typ max units v s operating supply range 4.75 5.0 5.25 v i s,tot total supply current all v cc pins plus out l 75 67 85.1 100 112 ma ma i s,out total supply current to out pin current to out l 62 55 71 92 95 ma ma i cc,out current to v cc pin either v cc pin may be used l 12 12.5 14 16 16.5 ma ma the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c, v cc = 5v, z source = z load = 50. typical measured dc electrical performance using test circuit a.
ltc6431-15 3 643115f ac e lec t rical c harac t eris t ics symbol parameter conditions min typ max units small signal bw C3db bandwidth de-embedded to package (low frequency cutoff 20mhz) 2000 mhz s11 input return loss, 20mhz to 2000mhz de-embedded to package C10 db s21 forward power gain, 50mhz to 300mhz de-embedded to package 15.5 db s12 reverse isolation, 20mhz to 3000mhz de-embedded to package C19 db s22 output return loss, 20mhz to 1700mhz de-embedded to package C10 db frequency = 50mhz s21 power gain de-embedded to package 15.5 db oip3 output third-order intercept point p out = 2dbm/tone, f = 1mhz a-grade b-grade 46.0 45.0 dbm dbm im3 third-order intermodulation p out = 2dbm/tone, f = 1mhz a-grade b-grade C88.0 C86.0 dbc dbc hd2 second harmonic distortion p out = 6dbm C58.0 dbc hd3 third harmonic distortion p out = 6dbm C88.0 dbc p1db output 1db compression point 20.5 dbm nf noise figure de-embedded to package 3.06 db frequency = 140mhz s21 power gain de-embedded to package 15.5 db oip3 output third-order intercept point p out = 2dbm/tone, f = 1mhz a-grade b-grade 47.0 46.0 dbm dbm im3 third-order intermodulation p out = 2dbm/tone, f = 1mhz a-grade b-grade C90.0 C88.0 dbc dbc hd2 second harmonic distortion p out = 6dbm C58.0 dbc hd3 third harmonic distortion p out = 6dbm C88.0 dbc p1db output 1db compression point 20.7 dbm nf noise figure de-embedded to package 3.20 db frequency = 240mhz s21 power gain de-embedded to package l 14.5 14.2 15.6 16.5 16.7 db db oip3 output third-order intercept point p out = 2dbm/tone, f = 8mhz a-grade b-grade 44.0 47.0 45.5 dbm dbm im3 third-order intermodulation p out = 2dbm/tone, f = 8mhz a-grade b-grade C84 C90.0 C87.0 dbc dbc hd2 second harmonic distortion p out = 6dbm C59.0 dbc hd3 third harmonic distortion p out = 6dbm C88.0 dbc p1db output 1db compression point 20.6 dbm nf noise figure de-embedded to package 3.33 db t a = 25c (note 3), v cc = 5v, z source = z load = 50, unless otherwise noted. measurements are performed using test circuit a, measuring from 50 sma to 50 sma without de-embedding (note 4).
ltc6431-15 4 643115f symbol parameter conditions min typ max units frequency = 300mhz s21 power gain de-embedded to package 15.5 db oip3 output third-order intercept point p out = 2dbm/tone, f = 1mhz a-grade b-grade 46.5 45.5 dbm dbm im3 third-order intermodulation p out = 2dbm/tone, f = 1mhz a-grade b-grade C89.0 C87.0 dbc dbc hd2 second harmonic distortion p out = 6dbm C60.0 dbc hd3 third harmonic distortion p out = 6dbm C86.0 dbc p1db output 1db compression point 20.6 dbm nf noise figure de-embedded to package 3.41 db frequency = 380mhz s21 power gain de-embedded to package 15.4 db oip3 output third-order intercept point p out = 2dbm/tone, f = 1mhz a-grade b-grade 46.0 45.0 dbm dbm im3 third-order intermodulation p out = 2dbm/tone, f = 1mhz a-grade b-grade C88.0 C86.0 dbc dbc hd2 second harmonic distortion p out = 6dbm C57.0 dbc hd3 third harmonic distortion p out = 6dbm C87.0 dbc p1db output 1db compression point 20.6 dbm nf noise figure de-embedded to package 3.48 db frequency = 500mhz s21 power gain de-embedded to package 15.3 db oip3 output third-order intercept point p out = 2dbm/tone, f = 1mhz a-grade b-grade 44.5 43.5 dbm dbm im3 third-order intermodulation p out = 2dbm/tone, f = 1mhz a-grade b-grade C85.0 C83.0 dbc dbc hd2 second harmonic distortion p out = 6dbm C55.6 dbc hd3 third harmonic distortion p out = 6dbm C77.0 dbc p1db output 1db compression point 20.6 dbm nf noise figure de-embedded to package 3.60 db frequency = 600mhz s21 power gain de-embedded to package 15.3 db oip3 output third-order intercept point p out = 2dbm/tone, f = 1mhz a-grade b-grade 41.5 40.5 dbm dbm im3 third-order intermodulation p out = 2dbm/tone, f = 1mhz a-grade b-grade C79.0 C77.0 dbc dbc hd2 second harmonic distortion p out = 6dbm C53.6 dbc hd3 third harmonic distortion p out = 6dbm C69.0 dbc p1db output 1db compression point 20.6 dbm nf noise figure de-embedded to package 3.67 db ac e lec t rical c harac t eris t ics t a = 25c (note 3), v cc = 5v, z source = z load = 50, unless otherwise noted. measurements are performed using test circuit a, measuring from 50 sma to 50 sma without de-embedding (note 4).
ltc6431-15 5 643115f symbol parameter conditions min typ max units frequency = 700mhz s21 power gain de-embedded to package 15.2 db oip3 output third-order intercept point p out = 2dbm/tone, f = 1mhz a-grade b-grade 40.0 39.0 dbm dbm im3 third-order intermodulation p out = 2dbm/tone, f = 1mhz a-grade b-grade C76.0 C74.0 dbc dbc hd2 second harmonic distortion p out = 6dbm C51.9 dbc hd3 third harmonic distortion p out = 6dbm C69.0 dbc p1db output 1db compression point 20.3 dbm nf noise figure de-embedded to package 3.75 db frequency = 800mhz s21 power gain de-embedded to package 15.2 db oip3 output third-order intercept point p out = 2dbm/tone, f = 1mhz a-grade b-grade 39.0 38.0 dbm dbm im3 third-order intermodulation p out = 2dbm/tone, f = 1mhz a-grade b-grade C74 C72 dbc dbc hd2 second harmonic distortion p out = 6dbm C49.2 dbc hd3 third harmonic distortion p out = 6dbm C65.0 dbc p1db output 1db compression point 20.1 dbm nf noise figure de-embedded to package 3.83 db frequency = 900mhz s21 power gain de-embedded to package 15.1 db oip3 output third-order intercept point p out = 2dbm/tone, f = 1mhz a-grade b-grade 38.5 37.5 dbm dbm im3 third-order intermodulation p out = 2dbm/tone, f = 1mhz a-grade b-grade C73.0 C71.0 dbc dbc hd2 second harmonic distortion p out = 6dbm C46.7 dbc hd3 third harmonic distortion p out = 6dbm C63.0 dbc p1db output 1db compression point 19.9 dbm nf noise figure de-embedded to package 3.90 db frequency = 1000mhz s21 power gain de-embedded to package 15.0 db oip3 output third-order intercept point p out = 2dbm/tone, f = 1mhz a-grade b-grade 38.0 37.0 dbm dbm im3 third-order intermodulation p out = 2dbm/tone, f = 1mhz a-grade b-grade C72.0 C70.0 dbc dbc hd2 second harmonic distortion p out = 6dbm C45.0 dbc hd3 third harmonic distortion p out = 6dbm C59.0 dbc p1db output 1db compression point 19.5 dbm nf noise figure de-embedded to package 3.99 db ac e lec t rical c harac t eris t ics t a = 25c (note 3), v cc = 5v, z source = z load = 50, unless otherwise noted. measurements are performed using test circuit a, measuring from 50 sma to 50 sma without de-embedding (note 4). note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: guaranteed by design and characterization. this parameter is not tested. note 3: the ltc6431-15 is guaranteed functional over the case operating temperature range of C40c to 85c. note 4: small-signal parameters s and noise are de-embedded to the package pins, while large-signal parameters are measured directly from the circuit.
ltc6431-15 6 643115f typical p er f or m ance c harac t eris t ics s11 vs frequency over temperature s21 vs frequency over temperature s12 vs frequency over temperature s22 vs frequency over temperature s parameters vs frequency stability factor k vs frequency over temperature noise figure vs frequency over temperature frequency (mhz) 0 ?30 mag (db) ?20 ?10 0 10 1000 2000 500 1500 2500 643115 g01 3000 20 ?25 ?15 ?5 5 15 25 s11 s21 s12 s22 frequency (mhz) 0 0 stability factor k (unitless) 2 4 6 1000 2000 3000 4000 8 10 1 3 5 7 9 5000 643115 g02 100c 85c 60c 35c 25c 0c ?20c ?40c t case = frequency (mhz) 0 0 nf (db) 1 3 4 5 8 7 400 800 1000 2 6 200 600 1200 1400 643115 g03 ?40c 25c 85c t case = frequency (mhz) 0 ?25 mag s11 (db) ?20 ?15 ?10 ?5 0 500 1000 1500 2000 2500 3000 643115 g04 100c 85c 60c 35c 25c 0c ?20c ?40c t case = frequency (mhz) 0 0 mag s21 (db) 4 8 12 500 1000 1500 2000 2500 16 20 2 6 10 14 18 3000 643115 g05 100c 85c 60c 35c 25c 0c ?20c ?40c t case = frequency (mhz) 0 ?30 mag s12 (db) ?25 ?20 ?15 ?10 0 500 1000 1500 2000 2500 3000 ?5 643115 g06 100c 85c 60c 35c 25c 0c ?20c ?40c t case = 100c 85c 60c 35c 25c 0c ? 20c ? 40c t case = frequency (mhz) 0 ?30 mag s22 (db) ?25 ?20 ?15 ?10 0 500 1000 1500 2000 2500 3000 ?5 643115 g07 t a = 25c, v cc = 5v, z source = z load = 50, unless otherwise noted. measurements are performed using test circuit a, measuring from 50 sma to 50 sma without de-embedding (note 4).
ltc6431-15 7 643115f typical p er f or m ance c harac t eris t ics oip3 vs frequency over v cc voltage oip3 vs tone spacing over frequency oip3 vs frequency over case temperature oip3 vs frequency oip3 vs power out over frequency frequency (mhz) 0 oip3 (dbm) 44 46 48 42 40 400 800 200 600 1000 38 36 50 643115 g08 v cc = 5v, t = 25c p out = 2dbm/ tone f space = 1mhz z in = z out = 50 v cc = 5v p out = 2dbm/tone f space = 1mhz z in = z out = 50 rf power out (dbm/tone) ?10 oip3 (dbm) 38 48 50 52 ?6 ?2 2 34 44 36 46 32 30 42 40 ?8 ?4 6 10 0 4 8 643115 g09 50mhz 100mhz 200mhz 240mhz 300mhz 400mhz 500mhz 600mhz 700mhz 800mhz 900mhz 1000mhz frequency (mhz) 0 oip3 (dbm) 44 46 48 700 42 40 200 400 100 900 300 500 800 600 1000 36 34 38 50 643115 g10 t = 25c p out = 2dbm/tone f space = 1mhz z in = z out = 50 4.5v 4.75v 5v 5.25v 5.5v v cc = 5v, t = 25c p out = 2dbm/ tone z in = z out = 50 tone spacing (mhz) 0 oip3 (dbm) 44 46 48 14 42 40 4 8 2 18 6 10 16 12 20 38 36 50 643115 g11 50mhz 100mhz 200mhz 240mhz 300mhz 400mhz 500mhz 600mhz 700mhz 800mhz 900mhz 1000mhz frequency (mhz) 0 oip3 (dbm) 40 45 700 35 30 200 400 100 900 300 500 800 600 1000 25 20 50 643115 g12 85c 60c 25c 0c ?20c ?30c ?40c v cc = 5v p out = 2dbm/tone f space = 1mhz z in = z out = 50 a-grade t a = 25c, v cc = 5v, z source = z load = 50, unless otherwise noted. measurements are performed using test circuit a, measuring from 50 sma to 50 sma without de-embedding (note 4).
ltc6431-15 8 643115f typical p er f or m ance c harac t eris t ics gain vs output power over frequency p1db vs frequency output power vs input power over frequency output power (dbm) 0 12.0 gain (db) 13.0 14.0 15.0 5 10 20 15 16.0 12.5 13.5 14.5 15.5 643115 g20 60mhz 100mhz 140mhz 200mhz 240mhz 300mhz 400mhz 500mhz 600mhz 700mhz 800mhz 900mhz 1000mhz frequency (mhz) 0 p1db (dbm) 20 21 700 19 18 200 400 100 900 300 500 800 600 1000 17 16 22 643115 g21 60mhz 100mhz 140mhz 200mhz 240mhz 300mhz 400mhz 500mhz 600mhz 700mhz 800mhz 900mhz 1000mhz input power (dbm) ?10 output power (dbm) 8 18 20 22 ?6 ?2 2 4 14 6 16 2 0 12 10 ?8 ?4 6 10 0 4 8 643115 g19 t a = 25c, v cc = 5v, z source = z load = 50, unless otherwise noted. measurements are performed using test circuit a, measuring from 50 sma to 50 sma without de-embedding (note 4). total current (i tot ) vs v cc total current (i tot ) vs case temperature total current vs rf input power v cc (v) 4 i tot (ma) 90 5.75 80 70 4.5 5 4.25 4.75 5.25 5.5 6 60 50 100 t case = 25c 643115 g16 temperature (c) i tot (ma) 90 100 20 86 96 88 98 84 82 94 92 ?40 ?20 60 100 0 40 80 v cc = 5v 643115 g17 rf input power (dbm) ?15 total current (ma) 80 85 90 75 70 ?10 0?5 5 10 15 20 55 50 65 95 60 643115 g21 v cc = 5v t = 25c hd2 vs frequency over p out hd3 vs frequency over p out hd4 vs frequency over p out p out = 6dbm 8dbm 10dbm frequency (mhz) 0 hd2 (dbc) ?30 ?20 ?10 700 ?40 ?50 200 400 100 900 300 500 800 600 1000 ?60 ?70 0 643115 g13 p out = 6dbm 8dbm 10dbm frequency (mhz) 0 hd3 (dbc) ?30 ?20 ?10 700 ?40 ?60 200 400 100 900 300 500 800 600 1000 ?80 ?100 ?50 ?70 ?90 0 643115 g14 p out = 6dbm 8dbm 10dbm frequency (mhz) 0 hd4 (dbc) ?30 ?20 ?10 700 ?40 ?60 200 400 100 900 300 500 800 600 1000 ?80 ?100 ?50 ?70 ?90 0 643115 g15
ltc6431-15 9 643115f b lock diagra m p in func t ions gnd (pins 8, 17, 23, exposed pad pin 25): ground. for best rf performance, all ground pins should be connected to the printed circuit board ground plane. the exposed pad should have multiple via holes to an underlying ground plane for low inductance and good thermal dissipation. in (pin 24): signal input pin. this pin has an internally generated 2v dc bias. a dc blocking capacitor is required. see the applications information section for specific recommendations. v cc (pins 9, 22): positive power supply. either v cc pin should be connected to the 5v supply. bypass the v cc pin with 1000pf and 0.1f capacitors. the 1000pf capacitor should be physically close to pin 22. out (pin 18): amplifier output pin. a choke inductor is necessary to provide power from the 5v supply and to provide rf isolation. for best performance select a choke with low loss and high self-resonant frequency (srf). a dc blocking capacitor is also required. see the applica - tions information section for specific recommendations. dnc (pins 1 to 7, 10 to 15, 19 to 21): do not connect. do not connect these pins; allow them to float. failure to float these pins may impair operation of the ltc6431-15. t_diode (pin 16): optional diode. the t_diode can be forward-biased to ground with 1ma of current. the meas- ured voltage will be an indicator of chip temperature. 643115 bd v cc 9, 22 in bias and temperature compensation 24 out t_diode 18 16 gnd 8, 17, 23, 25 (exposed pad) 15db gain
ltc6431-15 10 643115f o pera t ion the ltc6431-15 is a highly linear, fixed-gain amplifier that is configured to operate single ended. its core signal path consists of a single amplifier stage minimizing stability is- sues. the input is a darlington pair for high input impedance and high current gain. additional circuit enhancements increase the output impedance and minimize the effects of internal miller capacitance. the ltc6431-15 starts with a classic rf gain-block topol - ogy but adds additional enhancements to achieve dramati- cally improved linearity. shunt and series feedback are added to lower the input/output impedance and match them simultaneously to the 50 source and load. meanwhile, an internal bias controller optimizes the internal operating point for peak linearity over environmental changes. this circuit architecture provides low noise, excellent rf power handling capability and wide bandwidthcharacteristics that are desirable for if signal chain applications. figure 1. application, test circuit a tes t c ircui t a port input port output 643115 f01 c7 1000pf l1 560nh dnc dnc dnc dnc dnc dnc out gnd t_diode dnc dnc dnc in gnd v cc dnc dnc dnc dnc gnd v cc dnc dnc dnc c6 0.1f c3 1000pf v cc = 5v c1 60pf optional stability network r1 350 c5 1nf ltc6431-15
ltc6431-15 11 643115f the ltc6431-15 is a highly linear fixed-gain amplifier which is designed for ease of use. implementing an rf gain stage is often a multistep project. typically an rf designer must choose a bias point and design a bias network. next the designer needs to address impedance matching with input and output matching networks and, finally, add stability networks to ensure stable operation in and out of band. these tasks are handled internally within the ltc6431-15. the ltc6431-15 has an internal self-biasing network which compensates for temperature variation and keeps the device biased for optimal linearity. therefore, input and output dc blocking capacitors are required. both the input and output are internally impedance matched to 50 from 20mhz to 1700mhz. similarly, an rf choke is required at the output to deliver dc current to the device. the rf choke acts as a high impedance (isolation) to the dc supply which is at rf ground. thus, the internal ltc6431-15 impedance matching is unaffected by the biasing network. the open collector output topology can deliver much more power than an amplifier whose collector is biased through a resistor or active load. choosing the right rf choke not all choke inductors are created equal. it is always important to select an inductor with low r loss , as this will drop the available voltage to the device. also look for an inductor with high self-resonant frequency (srf) as this will limit the upper frequency where the choke is useful. above the srf, the parasitic capacitance dominates and the choke impedance will drop. for these reasons, wire wound inductors are preferred, and multilayer ceramic chip inductors should be avoided for an rf choke. since the ltc6431-15 is capable of such wideband operation, a single choke value will probably not result in optimized performance across its full frequency band. table 1 lists target frequency bands and suggested corresponding inductor values. table 1. target frequency bands and suggested inductor values frequency band (mhz) inductor value (nh) model number manufacturer 20 to 100 1500nh 0805ls coilcraft www.coilcraft.com 100 to 500 560nh 0603ls 500 to 1000 100nh 0603ls 1000 to 2000 51nh 0603ls dc blocking capacitor the role of a dc blocking capacitor is straightforward: block the path of dc current and allow a low series imped- ance path for the ac signal. lower frequencies require a higher value of dc blocking capacitance. generally, 1000pf to 10000pf will suffice for operation down to 20mhz. the ltc6431-15 is relatively insensitive to the choice of blocking capacitor. rf bypass capacitor rf bypass capacitors act to shunt ac signals to ground with a low impedance path. it is best to place them as close as possible to the dc power supply pins of the device. any extra distance translates into additional series in- ductance which lowers the self-resonant frequency and useful bandwidth of the bypass capacitor. the suggested bypass capacitor network consists of two capacitors: a low value 1000pf capacitor to handle high frequencies in parallel with a larger 0.1f capacitor to handle lower frequencies. use ceramic capacitors of an appropriate physical size for each capacitance value (e.g., 0402 for the 1000pf, 0805 for the 0.1f) to minimize the equiva- lent series resistance (esr) of the capacitor. a pplica t ions i n f or m a t ion
ltc6431-15 12 643115f a pplica t ions i n f or m a t ion supply should also be applied to both of the v cc pins on the device. a suggested parallel 60pf, 350 network has been added to the input to ensure low frequency stability. the 60pf capacitance can be increased to improve low frequency (<150mhz) performance. however, the designer needs to be sure that the impedance presented at low frequency will not create instability. please note that a number of dnc pins are connected on the demo board. these connections are not necessary for normal circuit operation. exposed pad and ground plane considerations as with any rf device, minimizing ground inductance is critical. care should be taken with board layouts using these exposed pad packages. the maximum allowable number of minimum diameter via holes should be placed underneath the exposed pad and connect to as many ground plane layers as possible. this will provide good rf ground and low thermal impedance. maximizing the copper ground plane will also improve heat spreading and lower inductance. it is a good idea to cover the via holes with a solder mask on the backside of the pcb to prevent the solder from wicking away from the critical pcb to the exposed pad interface. the ltc6431-15 is a wide bandwidth part, but it is not intended for operation down to dc. the lower frequency cutoff (20mhz) is limited by on-chip matching elements. low frequency stability most rf gain blocks suffer from low frequency instability. to avoid any stability issues, the ltc6431-15 has an internal feedback network that lowers the gain and matches the input and output impedances at frequencies above 20mhz. this feedback network contains a series capacitor, so if at some low frequency the feedback fails, the gain increases and gross impedance mismatches occurindeed a recipe for instability. luckily, this situation is easily resolved with a parallel capacitor and resistor network on the input, as seen in figure 1. this network provides resistive loss at low frequencies and is bypassed by the parallel capaci- tor within the desired band of operation. however, if the ltc6431-15 is preceeded by a low frequency termination, such as a choke, the input stability network is not required. test circuit the test circuit shown in figure 2 is designed to allow evaluation of the ltc6431-15 with standard single-ended 50 test equipment. the circuit requires a minimum of external components. since the ltc6431-15 is a wideband part, the evaluation test circuit is optimized for wideband operation. obviously, for narrowband applications the circuit can be further optimized. as mentioned earlier, input and output dc blocking capacitors are required as this device is internally biased for optimal operation. a frequency appropriate choke and decoupling capacitors are required to provide dc bias to the rf out node. a 5v
ltc6431-15 13 643115f 5 5 4 4 3 3 2 2 1 1 d d c c b b a a 1. all resistors are in ohms, 0402. all capacitors are 0402. note: unless otherwise specified cal in cal out gnd +5v optional circuit 100-1200 mhz freq. assy u1 t3, t4 * r13,r14,r17,r18 r3, r4 j8 opt opt opt 1008 +in +out j10 -c ltc6431iuf-15 opt 0 ohm opt stuff opt john c. production 2 08-18-11 __ revision history description date approved eco rev 1 monday, june 25, 2012 11 if amp/adc driver kim t. john c. n/a ltc643xiuf family demo circuit 1774a size date: ic no. rev. sheet of title: approvals pcb des. app eng. technology fax: (408)434-0507 milpitas, ca 95035 phone: (408)432-1900 1630 mccarthy blvd. ltc confidential-for customer use only customer notice linear technology has made a best effort to design a circuit that meets customer-supplied specifications; however, it remains the customer's responsibility to verify proper and reliable operation in the actual application. component substitution and printed circuit board layout may significantly affect ci rcuit performance or reliability. contact linear technology applications engineering for assistance. this circuit is proprietary to linear technology and schematic supplied for use with linear technology parts. scale = none www.linear.com vcc vcc vcc vcc j7 sma-r r5 348 c11 1000pf l1 560nh c13 1000pf c18 1000pf jp2 hd2x4-100 12 34 56 78 l11 opt jp3 hd2x4-100 12 34 56 78 c21 1000pf j11 +5v c19 1000pf r2 348 e6 c16 1000pf j5 sma-r t1 see bom 6 4 1 5 3 c8 62pf c22 0.1uf c17 1000pf j6 sma-r c10 62pf c12 62pf e3 jp1 hd2x6-100 12 34 56 78 9 10 11 12 t2 see bom 6 4 1 5 3 u1 * 2 14 1 24 4 6 8 10 21 19 17 22 20 18 16 5 7 9 11 15 12 13 3 23 25 dnc gnd dnc +in dnc dnc gnd dnc dnc dnc gnd vcc dnc +out t_diode dnc dnc vcc dnc dnc dnc dnc dnc gnd gnd c1 1000pf j18 gnd r6 348 j10 sma-r * c7 1000pf c20 1000pf c3 1000pf a pplica t ions i n f or m a t ion figure 2. dc1774a-c demo board schematic figure 3. demo board 643115 f03
ltc6431-15 14 643115f s p ara m e t ers 5v, 90ma, z = 50, t = 25c, de-embedded to package pins frequency (mhz) s11 (mag) s11 (ph) s21 (mag) s21 (ph) s12 (mag) s12 (ph) s22 (mag) s22 (ph) gtu (max) stability (k) 23.5 C14.90 C93.74 15.94 166.13 C19.01 8.83 C15.39 C77.56 16.21 0.99 83.5 C21.83 C128.88 15.54 169.51 C18.92 C3.42 C26.58 C72.76 15.58 1.07 143 C22.33 C142.38 15.54 166.10 C18.98 C8.97 C31.71 C52.44 15.57 1.07 203 C22.14 C153.70 15.54 161.63 C19.04 C13.69 C36.22 C29.74 15.57 1.08 263 C21.88 C162.35 15.52 156.90 C19.10 C18.05 C36.75 C13.45 15.55 1.08 323 C21.02 C168.55 15.49 152.16 C19.15 C22.46 C35.10 C3.73 15.52 1.08 383 C20.39 C172.14 15.42 147.41 C19.23 C26.61 C31.62 0.84 15.46 1.09 443 C19.55 C175.07 15.41 142.91 C19.29 C30.83 C29.46 C1.01 15.46 1.09 503 C18.88 C177.54 15.37 138.07 C19.37 C34.91 C26.62 C2.90 15.44 1.09 563 C18.39 179.31 15.35 133.30 C19.44 C39.04 C25.06 C7.32 15.43 1.09 623 C18.02 175.72 15.32 128.48 C19.53 C43.16 C23.84 C14.68 15.41 1.10 683 C17.70 171.89 15.29 123.64 C19.61 C47.19 C22.46 C23.42 15.39 1.10 743 C17.37 168.02 15.26 118.80 C19.71 C51.39 C21.37 C30.32 15.37 1.10 803 C17.06 164.02 15.20 113.94 C19.82 C55.31 C20.17 C37.91 15.33 1.11 863 C16.73 160.39 15.17 109.07 C19.92 C59.53 C19.13 C44.68 15.31 1.11 923 C16.35 156.50 15.12 104.20 C20.04 C63.43 C18.11 C50.82 15.29 1.11 983 C16.05 152.86 15.07 99.34 C20.16 C67.53 C17.31 C57.37 15.26 1.12 1049 C15.76 149.53 15.02 94.39 C20.29 C71.52 C16.51 C63.98 15.24 1.12 1109 C15.51 146.42 14.98 89.31 C20.42 C75.48 C15.82 C70.79 15.22 1.13 1160 C15.29 143.29 14.90 84.36 C20.55 C79.56 C15.22 C78.18 15.16 1.13 1220 C15.13 141.27 14.87 79.21 C20.70 C83.45 C14.56 C85.99 15.16 1.14 1280 C14.93 138.82 14.80 74.05 C20.84 C87.50 C13.94 C93.89 15.12 1.14 1340 C14.75 137.08 14.72 69.04 C21.01 C91.46 C13.37 C101.73 15.07 1.15 1400 C14.52 135.84 14.67 63.48 C21.14 C95.38 C12.79 C109.91 15.06 1.16 1460 C14.26 134.03 14.55 58.17 C21.34 C99.38 C12.27 C117.55 14.98 1.17 1520 C13.88 132.68 14.43 52.80 C21.47 C103.25 C11.71 C125.53 14.91 1.18 1580 C13.48 130.52 14.27 47.38 C21.63 C107.46 C11.24 C134.17 14.80 1.19 1640 C13.07 128.54 14.06 42.05 C21.83 C111.37 C10.62 C142.12 14.67 1.20 1700 C12.67 126.19 13.82 37.06 C22.01 C115.95 C10.07 C150.09 14.51 1.22 1760 C12.21 123.77 13.60 32.36 C22.30 C119.76 C9.51 C158.23 14.39 1.24 1820 C11.77 120.88 13.31 27.42 C22.49 C123.59 C9.02 C165.81 14.19 1.26 1880 C11.38 117.51 13.02 23.82 C22.74 C127.66 C8.65 C172.96 13.98 1.29 1940 C10.95 114.44 12.83 19.28 C23.04 C131.54 C8.28 179.92 13.89 1.31 2000 C10.57 110.59 12.51 15.92 C23.17 C134.66 C7.97 172.64 13.66 1.34 2060 C10.19 106.94 12.46 12.13 C23.59 C139.47 C7.71 166.43 13.71 1.36 2120 C9.78 103.11 12.20 7.92 C23.73 C141.66 C7.49 159.51 13.53 1.38 2180 C9.44 99.15 12.20 4.71 C23.99 C146.81 C7.32 153.38 13.62 1.39 2240 C9.02 95.22 12.10 C0.60 C24.32 C149.09 C7.17 146.92 13.60 1.41 2300 C8.67 91.22 12.07 C5.36 C24.53 C152.92 C7.05 140.33 13.66 1.41
ltc6431-15 15 643115f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 4.00 0.10 (4 sides) note: 1. drawing proposed to be made a jedec package outline mo-220 variation (wggd-x)?to be approved 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side, if present 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 2423 1 2 bottom view?exposed pad 2.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (uf24) qfn 0105 rev b recommended solder pad pitch and dimensions 0.70 0.05 0.25 0.05 0.50 bsc 2.45 0.05 (4 sides) 3.10 0.05 4.50 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer uf package 24-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1697 rev b) p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc6431-15 16 643115f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2012 lt 0712 ? printed in usa r ela t e d p ar t s part number description comments fixed gain if amplifiers/adc drivers ltc6417 1.6ghz low noise high linearity differential buffer/ adc driver oip3 = 41dbm at 300mhz; can drive 50 differential output; high speed voltage clamping protects subsequent circuitry ltc6416 2ghz, 16-bit differential adc buffer C72dbc im2 at 300mhz 2v p-p composite; i s = 42ma; en = 2.8nv/ hz; a v = 0db; 300mhz ltc6410-6 1.4ghz differential if amplifier with configurable input impedance oip3 = 36dbm at 70mhz; flexible interface to mixer if port ltc6400-8/ltc6400-14/ ltc6400-20/ltc6400-26 1.8ghz low noise, low distortion differential adc drivers C71dbc im3 at 240mhz 2v p-p composite; i s = 90ma; a v = 8db / 14db / 20db / 26db ltc6420-20 dual 1.8ghz low noise, low distortion differential adc drivers dual version of the ltc6400-20; a v = 20db lt1993-2/lt1993-4/ lt1993-10 800mhz differential amplifier/adc drivers C72dbc im3 at 70mhz 2v p-p composite; a v = 2v/ v, 4v/ v, 10v/ v variable gain if amplifiers/adc drivers ltc6412 800mhz, 31db range analog-controlled vga oip3 = 35dbm at 240mhz; continuously adjustable gain control baseband differential amplifiers lt6411 low power differential adc driver/dual selectable gain amplifier C83dbc im3 at 70mhz 2v p-p composite; a v = 1, C1 or 2; 16ma; excellent for single-ended to differential conversion ltc6406 3ghz rail-to-rail input differential amplifier/ adc driver C65dbc im3 at 50mhz 2v p-p composite; rail-to-rail inputs; en = 1.6nv/ hz; 18ma ltc6404-1/ltc6404-2 low noise rail-to-rail output differential amplifier/ adc driver 16-bit snr, sfdr at 10mhz; rail-to-rail outputs; en = 1.5nv/ hz ; ltc6404-1 is unity-gain stable, ltc6404-2 is gain-of-two stable ltc6403-1 low noise rail-to-rail output differential 16-bit snr, sfdr at 3mhz; rail-to-rail outputs; en = 2.8nv/ hz lt1994 low noise, low distortion differential amplifier/adc driver 16-bit snr, sfdr at 1mhz; rail-to-rail outputs high speed adcs ltc2208/ltc2209 16-bit, 130msps/160msps adcs 78dbfs/77dbfs noise floor, 100db sfdr, 2.25v p-p or 1.5v p-p input range ltc2259-16 16-bit, 80msps, 1.8v adc 89mw, 73.1db snr, 88db sfdr, 1v p-p to 2v p-p input range ltc2160/ltc2161/ ltc2162/ltc2163/ ltc2164/ltc2165 16-bit, 25msps/40msps/65msps/80msps/105msps/ 125msps, 1.8v adcs 77db snr, 90db sfdr, 1v p-p to 2v p-p input range ltc2150-14/ltc2151-14/ ltc2152-14/LTC2153-14 14-bit, 170msps/210msps/250msps/310msps, 1.8v adcs single adcs, >68db snr, >88db sfdr, 1.32v p-p input range ltc2155-14/ltc2156-14/ ltc2157-14/ltc2158-14 14-bit, 170msps/210msps/250msps/310msps, 1.8v adcs dual adcs, >68db snr, >88db sfdr, 1.32v p-p input range typical a pplica t ion 643115 ta02 ltc6431-15 r source 50 v cc = 5v c = 1000pf 1000pf 9, 22 8, 17, 23, 25 24 18 5v r f choke, l = 560nh r load 50 0.1f c =1000pf

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